Transducer monitoring arrangement

ABSTRACT

An arrangement for monitoring a transducer, or detector, which produces an analogue or digital output signal corresponding to a state sensed by the transducer. The invention is characterized in that the transducer includes activatable and deactivatable elements (RB 3, 23) which are intended to influence the transducer in a manner to cause the transducer to produce a signal which deviates from the actual state detected by the transducer, and in that there is provided a control circuit (10) which is intended to activate and/or deactivate the elements in a predetermined sequence, in response to the signal produced by the transducer. The arrangement also includes a control device for detecting the transducer output signal and comparing changes in the output signal in dependence on the activation and/or deactivation of the elements (RB 3, 23). The control device is constructed to detect whether or not the function of the transducer is correct, on the basis of this comparison.

The present invention relates to an arrangement for monitoring detectorsor transducers of the kind used to indicate different states.

By detector, hereinafter referred to as transducer is meant a devicewhich is constructed to respond to a given event or occurrence, or to agiven state and to produce accordingly a predetermined electric signal,which may constitute a measuring value or a predetermined statevariable.

Such transducers are used in different automatic systems, such asindustrial process control systems, or in complicated machines, such asaircraft among others.

The use of transducers for collecting input data for process controlpurposes stands and falls on the reliability of the transducers used inthe system. This is emphasized by the fact that in an automatic process,about 80% of the downtime periods and distrubances experienced inoperation are caused by malfunctioning of the transducers used.

The nature of this problem is accentuated when an automatic process ismonitored and controlled by a computer system.

The problem is solved by the present invention, which proposes that thefunction of such transducers is monitored.

Accordingly, the present invention relates to an arrangement formonitoring transducers which are intended to produce an analogue ordigital output signal corresponding to a state sensed by the transduceror detector, and is characterised in that the transducer includesactivatable and deactivatable elements which are intended to influencethe transducer in a manner such that said transducer will produce asignal which deviates from the actual state sensed by the transducer;and in that the arrangement includes a control circuit which, inresponse to a given signal, is responsive in activating and/ordeactivating said elements in a predetermined sequence; in that acontrol device is provided for detecting the output signal of thetransducer and comparing changes in the output signal caused byactivation and/or deactivation of said elements; and in that the controldevice is effective, through said comparison, in detecting whether ornot the transducer function is correct.

Thus, the invention relates to an transducer of the kind which isintended to pass through a test mode in which the transducer or itsdetecting area in space is subjected to such changes that the event orthe state which the transducer is intended to detect is simulated duringthe so-called test mode, i.e. when the transducer is tested, thetransducer reporting the simulated event or state to a recieving device,such as a superordinal control system.

According to one embodiment of the invention, the test mode is initiatedby the superordinal control system, such as a datorised control system.When the transducer is subjected to the test mode, it will send to thereceiver signals which are compared with predetermined signals orvalues, these predetermined signals or values corresponding to thosesignals obtained from the transducer when its function is known to becorrect. Thus, the transmission of the transducer signal from thetransducer to the receiver is also tested, in addition to testing thetransducer.

One method of using this type of transducer is for the function of thetransducer to be tested systematically, prior to accepting a transducersignal, by calling and activating the test mode. In this way, priorknowledge can be obtained of those functional errors which are likely tooccur, which provides basis for a systematic and ordered errorcorrection.

Another method of using this type of transducer is afforded whensystematic use of the test mode is combined with duplication of criticaltransducer functions. The probability that both of the transducers willproduce an error signal simultaneously is low. The use of the test modeenables a faulty transducer to be replaced before both transducersproduce a faulty transducer signal.

It is obvious that the inventive arrangement has a very wide field ofuse and that the arrangement is not restricted to a few, special fieldsin which transducers are used.

It will also be understood that the present arrangement can be appliedwith a very large number of different kinds of transducer.

The invention will now be described in more detail with reference to anumber of mutually different, exemplifying embodiments in which thepresent arrangement is applied to different kinds of transducer.

It will be understood that the present invention is not limited to thetypes of transducer described below, and that the invention can beapplied to other types of transducers, such as electric transducers forindicating electrical magnitudes, mechanical transducers in which, forinstance, relays or other electromechanical devices activate themechanical transducer during the test mode period, etc.

The aforesaid exemplifying embodiments are illustrated in theaccompanying drawings, in which

FIG. 1 is a block schematic of an arrangement according to theinvention;

FIG. 2 illustrates an inductive transducer with associated circuits;

FIG. 3 is a more detailed view of the circuits illustrated in FIG. 2;

FIGS. 4 and 5 are different pulse diagrams in which the status ofdifferent inputs, outputs and points are plotted against time;

FIGS. 6 and 7 illustrate a capacitive transducer;

FIG. 8 illustrates an transducer of the kind utilizing a Wheatstonebridge; and

FIG. 9 is an optical transducer.

As before mentioned, the present invention is characterised, inter alia,in that the transducer includes activatable and deactivable elementswhich are intended to influence the transducer in a manner to cause thetransducer to produce a signal which deviates from the actual statesensed or detected thereby. Thus, these elements are constructed in amanner adapted to the type of transducer intended, as exemplified in theembodiments described hereinafter.

In the block schematic of FIG. 1, the reference numeral 1 identifies acontrol device, for instance a computer, which is connected byconductors to a number of transducers 2-5. Connected to the transducers2-5 are respective activatable and deactivatable elements 6-9. A controlcircuit 10-13 is connected to each respective element 6-9.

The control device 1 is constructed to control or regulate mutuallydifferent components, apparatus or processes over lines 14, depending onthe field of application, in response to signals sent from thetransducers to the control device in respect of the various statesdetected.

According to the invention, respective control circuits 10-13 areconstructed to activate and/or deactivate said elements 6-9 in apredetermined sequence, in response to a given signal.

The control device is also constructed to detect the output signals ofrespective transducers and to compare changes in the output signaloccurring as a result of the activation and/or deactivation of saidelement 6-9. The control device is intended herewith to detect whetherthe function of the transducer is correct or not, through saidcomparison.

According to one preferred embodiment of the invention, the elements 6-9are integrated with the electronics of the transducer and consist ofactivatable and deactivatable electrical elements.

Preferably, the aforesaid elements will be activated and deactivated bymeans of electronic switches, preferably transistors, in which case saidcontrol circuits 10-13 will be constructed to control said switches inthe aforesaid predetermined sequence.

Various different transducer embodiments provided with an arrangementaccording to the present invention will now be described.

An inductive transducer may be used, for instance, to indicate thepresence of a metal object or to indicate a distance to a metal object.

FIG. 2 illustrates one such transducer.

The function is based on an LC-oscillator which includes a coil 20 and acapacitor 21, the coil 20 being the coil which is activated orinfluenced by a metal object 22 located in the close proximity of thetransducer. The LC-oscillator may operate, for instance, at a frequencyof 500 kHz. When a metal object comes close to the coil 20, heavycurrent losses will occur in the metal, therewith decreasing theoscillating amplitude of the oscillator.

This reduction in amplitude is converted to a measurement value signalwhich is sent as an output signal from the transducer to the controldevice, in which the measurement value signal is evaluated as indicatingthe presence of the metal object or a distance to said metal object. Thetransducer is supplied with voltage through the conductor 29.

In this case, the aforesaid activatable and deactivatable elements havethe form of losses which are brought into and out of the system.

FIG. 2 illustrates two switches S1 and S2. The conductors are connectedat the points A and B to the points in front of the arrows at A and B.When the switch S1 is closed, inter alia the resistance RB 3 will bedisconnected. When the switch S2 is closed, there is connected aninductance in the form of a further coil 23.

The aforementioned test mode is initiated by sending a test pulse signalto the input 24 of the control circuit 10.

When the transducer, or detector, is a digital transducer, by which ismeant that the transducer will produce one or two signals indicating oneor two states, the control circuit 10 is constructed to detect firstwhich of the two states is indicated by the transducer and then toactivate or deactivate said elements, so that the transducer will becaused to produce a signal corresponding to the opposite state. Thefunction of first detecting the state indicated by the transducer isessential in the case of digital transducers.

In those cases when the test mode is initiated by activating elementswhich are operative in a direction towards the state in which thetransducer is already found, an erroneous evaluation will be made of thesignal sent by the transducer.

In the case of digital transducers, it is essential that the elementsinfluence the transducer to an extent such as to overcome any hysteresisof the transducer. Furthermore, in the case of digital transducers, itis essential that the transducer will continue in the state indicatedprior to commencing the test mode, upon completion of said mode. Thislast mentioned is particularly important in the case of transducershaving hysteresis effect.

When the transducer illustrated in FIG. 2 is located in the presence ofan object 22, the oscillator amplitude will fall as a result of eddycurrent losses. In this case, the control circuit 10 is constructed toclose the switch S1 at the beginning of the test mode period, in amanner hereinafter described, wherewith the loss RB 3 is deactivated orremoved and the oscillator amplitude increases to a value whichcorresponds to the absence of the object. Immediately after re-openingthe switch S1, the switch S2 is closed so as to bring in, or activate,the coil 23, which causes a loss of such high value as to reduce theoscillator amplitude to a lower level than the level of oscillatoramplitude obtained when indicating the object. The test mode isterminated by re-opening the switch S2, by the control circuit, therebyreturning the transducer to its normal detection mode.

When the transducer indicates the absence of an object, the controlcircuit 10, at the beginning of the test mode period, will first closethe switch S2, wherewith the oscillator amplitude returns to a level orvalue corresponding to the presence of an object. Immediately after theswitch S2 is re-opened, the switch S1 is closed, therewith causing theoscillator amplitude to increase to a level higher than the levelobtained in the absence of the object. The test mode period isterminated by opening of the switch S1 by the control circuit 10, thetransducer therewith returning to its normal detection mode.

The aforedescribed test mode has a reversible sequence. In the firstinstance, first losses were removed or deactivated, whereafter losseswere induced or activated. In the second instance, first losses wereinduced or activated, whereafter losses were removed or deactivated.This test mode permits hysteresis to be obtained between indication andnon-indication of objects, which is essential in order to ensure that anunambiguous indication is given.

As before mentioned, the transducer illustrated in FIG. 2 is constructedto produce a digital output signal. The conductive status of thetransistor T is caused to change by the presence or the absence of anobject. The signal on the collector of the transistor T is amplified bymeans of the amplifier F and is produced in the form of an output signalon the output 25.

However, when the transducer is constructed to produce an analogueoutput signal, the control circuit 10 is arranged to first close theswitch S1 and, after said switch has been re-opened, to close the switchS2, or vice versa. In this case, the control device 1 is constructed tocompare the output signals thus obtained from the transducer withpredetermined values illustrative of how the amplitude of the outputsignal present prior to the test mode was activated by the activationand deactivation of losses during the test mode.

In the case of digital transducers, the switches S1 and S2 can be openedand closed quickly, whereas in the case of analogue transducers thevarious sections of the test mode should be short time intervals ofdetermined length.

As before mentioned, in the case of digital transducers the outputsignal of the transducer is first sensed by the control circuit 10 priorto commencing the test mode.

To this end, the control circuit 10 includes a directional logic circuit10', the construction and function of which will be described brieflybelow, see FIG. 3. FIG. 3 shows the points A and B, the points A and Bof FIG. 2. FIG. 3 is thus a more detailed view of part of the FIG. 2illustration.

The switches S1 and S2 illustrated in FIG. 2 are preferably electronicswitches, preferably transistor switches, constructed in accordance withthe FIG. 3 illustration. Thus, the switch S1 includes the transistors T1and T2. The switch S2 includes the transistors T3 and T4.

A conductor 26 extends from the output 25 in FIG. 2 to the directionallogic circuit 10'.

The transducer produces on said output a high or a low signal, dependingon whether an object is present or not.

This signal is applied to the input 26 of the logic circuit 10'. Thelogic circuit includes an integrated circuit IC1, which may, forinstance, be an IC-circuit designated CD 4042B.

When no test pulse is present on the input 24 of the IC-circuit, theinput is low. Provided that the input 24 is low, the outputs 27, 28 fromthe IC-circuit will follow the signal on the input 26, i.e. thetransducer output signal.

The logic circuit 10' also includes three NAND-gates G1, G2 and G3,which may comprise an IC-circuit designated CD 4093B.

The inputs on the NAND-gates G1, G2 and G3 are connected to the outputs27 and 28 and to the input 24 in the manner illustrated in FIG. 3. Theoutputs from the NAND-gates G2 and G3 remain static when no test pulseis found on the input 24.

The control device 1 sends a test pulse to the input 24 and to one ofthe inputs on G2 or G3. When the test pulse is received in the logiccircuit 10', the outputs 27 and 28 are locked to the signal sent by thetransducer and found on the input 26 upon receipt of the test pulse, andare held locked during the period at which the digital test pulse ishigh. Upon receipt of the test pulse, the output on G2 or G3 will bechanged from a high level to a low level. The NAND-gate output which ischanged to a low level will depend on whether it is the output 27 or theoutput 28 which is high.

Assume that the input 26 is high when the test pulse is received. Inthis case, the output 27 will be high during the duration of the testpulse, which means that the output on G2 is low during said duration ofthe pulse. The output from G3 remains static, since the output 28 willbe low.

Subsequent to inversion in the NAND-gate G1, the output from G2 appliesa positive pulse on a differential capacitor C1, which results in apositive voltage jump relative to the 0-level at the point 1 in FIG. 3.This voltage jump causes the transistor T1 to conduct over a somewhatshorter period than the length of the test pulse. At the end of the testpulse, there is obtained a negative voltage jump in relation to the0-level at the point 1, which causes the transistor T3 to conduct over alength of time equal to the conductive period of T1. The aforedescribedresults first in closure of the switch S1 of FIG. 2 and subsequentopening of said switch, and thereafter closing and subsequent opening ofthe switch S2 in FIG. 2.

On the other hand, when the input 26 is low at the time of receiving thetest pulse, the output 27 will be low, whereas the output 28 will behigh. This means that the output on G3 will be changed from a high valueto a low value when the test pulse is received. In this case, a negativepulse is obtained on the output G3, this pulse being applied to adifferential capacitor C2, which results in a negative voltage jumprelative to the 0-level at the point 2 in FIG. 3. This voltage jumpcauses the transistor T4 to conduct over a somewhat shorter time periodthan the length of the test pulse. At the end of the test pulse, thereis obtained a positive voltage jump relative to the 0-level at the point2, which was caused T2 to conduct conduct over a period of time equal inlength to the time period for which transistor T4 was caused to conduct.

The aforedescribed results first in closure of the switch S2 in FIG. 2,and subsequent opening of the switch, followed by closing of the switchS1 in FIG. 2 and subsequent opening of said switch.

As will be evident from the aforegoing, the control circuit isconstructed to first detect which of the two states is indicated by thetransducer and then to activate or deactivate the aforesaid elements soas to cause the transducer to produce a signal which corresponds to theopposite state.

When the transducer used is an analogue transducer, no directional logiccircuit 10' is used. Instead, a test pulse is applied directly to thedifferential capacitor C1. The transistors T2 and T4 with associatedresistances, and the differential capacitor C2 are not included in thisembodiment.

When a test pulse is applied to the differential capacitor C1, thetransistor T1 is first caused to conduct over a period which is somewhatshorter than the length of the test pulse. At the end of the test pulse,the transistor T3 will conduct over a period which is equally as long asthe transistor T1. Thus, this means that the switch S1 is first closedand then opened, and that the switch S2 is closed and then opened.

FIGS. 4 and 5 illustrate respectively a number of pulse diagrams inwhich the status of the inputs, outputs and points is shown as afunction of time prior to, during, and subsequent to the duration of atest pulse having the appearance illustrated in FIGS. 4 and 5respectively. In FIGS. 4 and 5, the reference "1" indicates that thesignal is "high", and the reference "0" indicates that the signal is"low". With regard to the references in FIGS. 4 and 5, these correspondto the references shown in FIG. 3. Thus, Q denotes the output 27; Qdenotes the output 28. DATA IN denotes the input 26.

The reference signs G3, G2 and G1 identify the outputs of respectiveNAND-gates.

The last four diagrams in FIGS. 4 and 5 illustrate when respectivetransistors T1, T2, T3 and T4 are conductive and non-conductive. Thereference "1" indicates that the transistor is conductive and thereference "0" indicates that the transistor is non-conductive. Thus, itwill be evident that when a test pulse is sent to the control circuit10, losses will be activated and deactivated in the aforedescribedmanner, irrespective of whether the transducer is a digital transduceror an analog transducer.

In the case of an inductive transducer, the aforesaid elements consistof impedences, preferably inductances and resistances.

The described control circuit may, of course, be used with othertransducers than inductive transducers, the control circuit being usedin the manner described for closing and opening two switches S1 and S2.

According to a preferred embodiment, such as that described above, thecontrol circuit is integrated with the transducer, or detector.

However, it will be understood that the whole of the control circuit, orparts thereof, may be incorporated in the control device.

As before mentioned, the control device 1 is constructed to comparesignals obtained from the transducer during the test mode withpredetermined values and therewith detect whether or not the function ofthe transducer is correct. In one instance, the control device maycomprise a computer which is programmed to carry out this comparison, ina known manner.

In another instance, that part of the control device which carries outsaid comparison may, instead, be integrated in the electronics of thetransducer, i.e. connected to the control circuit. Particularly in thecase of digital transducers, this part of the control device maycomprise a gate network arranged, in a manner known per se, to comparethe output signal from the transducer during the test mode with outputsignals from the gate network G1, G2, G3 of the control circuit.

A capacitive transducer is illustrated in FIG. 6. A capacitivetransducer can, inter alia, be used to indicate the presence or absenceof an object which is not metallic.

The measuring head of such a transducer 30 may have the configurationillustrated in FIG. 7, i.e. the configuration of a cylindrical capacitorconstructed from capacitor electrodes 31, 32 whose capacitance ischanged when an object 33 is sufficiently close to the measuring head30.

FIG. 6 illustrates the transducer head located within a broken-lineframe. A known capacitive transducer includes an RC-oscillator 34 of thephase shift type and constructed, as shown in FIG. 6, of capacitancesC5-C7 including the measuring head C5 and resistances R1-R3. ThisRC-oscillator is dimensioned so as not to oscillate before saidcapacitance C5 exceeds a given value, i.e. before an object is insufficiently close proximity.

A test mode for a capacitive transducer is designed so that capacitancescan be activated and deactivated in a manner to simulate the presence orabsence of an object.

FIG. 6 illustrates a control circuit 10" designated "TEST LOGIC", whichhas a corresponding configuration to that described above with referenceto FIGS. 2 and 3 in respect of a digital or analogue transducer. Thiscontrol circuit 10" includes two switches S1 and S2 for activating anddeactivating capacitances C3 and C4. The supply lines of the transducerare referenced 35. The output of the transducer is referenced 36 and thecontrol circuit input is referenced 37. The test mode functions in thefollowing manner. When the transducer indicates the presence of anobject, a test pulse on the input 37 will cause the capacitance C4 to bedeactivated, by opening of the switch S2, therewith simulating thepresence of an object. When the transducer indicates the absence of anobject, the switch S1 is instead closed, wherewith a further capacitanceC3 is activated so as to simulate the presence of an object.

When the transducer is a digital transducer, there is first detected thestate indicated by the transducer, whereafter the oppostie state issimulated, as described above with referenced to the inductivetransducer.

When the transducer is an analogue transducer, the control circuit 10"is constructed in a manner corresponding to that described above withreference to an analogue inductive transducer, with which the test modecauses both states to be simulated over a respectively short timeperiod.

The capacitances C3 and C4 may have the form of conventional capacitorcomponents, although they may also comprise electrodes 38, 39 on themeasuring head which are activated and deactivated via conductors, 40,41, in the same manner as the capacitances C3 and C4 are activated anddeactivated.

Mechanical transducers, such as limit switches, having one or moreelectro-mechanical components can be tested in the aforedescribedmanner. In this case, a control circuit of the aforedescribed kind andelectromagnetic devices may be arranged to activate mechanically themechanical transducer.

A brief description will now be given of some other types of transducerof detector with which the present invention may be applied. Thisdescription simply aims to exemplify the wide field of use of theinventive principle with respect to transducer types, since it is notpossible to describe all types of transducers here, because of theenormous variety of such transducers.

One type of transducer is based on the principle that the magnitude tobe measured will influence the impedence of an electric circuit element,generally a resistance. Examples of such transducers include straingauges, pressure gauges based on a piezo-resistive semiconductormaterial whose resistance will change with pressure, flow transducers inwhich the resistance of a heated wire will change as a result of heattransfer proportional to the flow passing through the wire, andtemperature transducers which utilize a temperature responsiveresistance, etc.

FIG. 8 illustrates a type of transducer 50 which has the form of aWheatstone bridge, in which four mutually identical impedance elements5, 51', 51" are supplied with voltage diagonally by means of a voltagesource 52, wherewith in a deviation from balance is detected as acurrent the conductors 53, 54 across the other diagonal. In this case,one of the impedances 51', 51" forms the aforedescribed transducerelement. A control circuit 10 of the aforesaid kind is constructed tocontrol two switches S1 and S2. By way of example, there is described atemperature transducer in which the impedance 51' is a temperatureresponsive resistance. When the switch S1 is closed, the impedance 51"is deactivated, which simulates, for instance, an increase intemperature. When the switch S2 is opened, the impedance 55 isactivated, which corresponds, for instance, to a decrease intemperature. This type of transducer or detector can be made digital oranalogue, the description made with reference to the inductivetransducer applying in this case.

Another type of transducer is an optical, photo-cell transducer. Onesuch transducer is illustrated in FIG. 9 and includes a light emittingdevice 60, such as a photo-diode, a light sensitive device 61, such as aphoto transistor, and a reflector 62. According to one embodiment, saidelement includes means for interrupting a light beam passing between thelight emitting device to the light sensitive device, via a reflector,and means for establishing an alternative beam path between the lightemitting and the light sensitive device.

Said means includes a prism 63 where one or two sides thereof, in theillustrative embodiment two sides 64, 65, are provided with a layer 66,67 of voltage controlled liquid crystals, a so-called LCD-layer. TheLCD-layer will cause the refractive index to change on relevant sides ofthe prism when a voltage is applied to the LCD-layer.

The prism 63 is surrounded by material pieces 74, 75, preferably ofmutually the same material. The prism 63 and the pieces of material 74,75, together form a body having two mutually parallel sides 76, 77 whichlie in a plane at right angles to the beam path between the devices 60,61 and the reflector 62.

The refractive index in an LCD-layer is influenced when a voltage isapplied to the layer. The material from which the prism, the said piecesand the LCD-layer are formed is selected so that when no voltage isapplied to the LCD-layer, light will be transmitted in accordance withthe beam path 72, 68, 73.

Furthermore, the LCD-layer is selected so that its refractive index willdecrease to a sufficient extent to give total reflection on the sidesurface 64 and 65 respectively when respective LCD-layers have a voltageapplied thereto.

For instance, a prism and associated LCD-layer may be constructed sothat when none of the LCD-layers has a voltage applied thereto, the beampath 68 shown in broken lines will prevail between the light emittingdevice 60, the reflector 62 and the light sensitive device 61. Thearrangement includes two switches S1 and S2, which are controlled by acontrol circuit of the aforedescribed kind. When solely the switch S2 isclosed, a voltage is applied to the LCD-layer 67, wherewith the beam 68from the reflector 62 and incident on the prism 63 will no longer betransmitted through the prism, but will instead be reflected onto theside surface 65 as illustrated by the beam 69.

When solely the switch S1 is closed, a voltage will be applied to theLCD-layer 66, wherewith the light transmitted from the light emittingdevice 60 will not be transmitted through the prism, but will bereflected onto the side surface 64 and transmitted through the sidesurface 65, as illustrated by the beams 70, 71.

When both of the switches S1 and S2 are closed, the light 72 emitted bythe light emitter device 60 will be reflected against the sides of 64and against the side surface 65 onto the light sensitive device 61, asillustrated by the light beams 70, 73.

Instead of using a prism provided with LCD-layers in the aforesaiddescribed manner, there may be used instead conventional, downwardly andupwardly pivotal mirrors which are operated by means of electromagneticdevices controlled via a control circuit of the described kind, in acorresponding manner to the control of the switches S1 and S2.

In the case of the FIG. 9 embodiment, the switches S1 and S2 areconnected to a control circuit 10 of the aforedescribed kind, thiscircuit including a directional logic circuit of the described kindoperative in first detecting whether or not the photo-cell arrangementindicates an object in its beam path 68 and then simulating the oppositestate.

When the transducer, or detector, occupies the state in which no objectis present in the beam path 68, the switch S2 is closed so that thelight 68 will never reach the light sensitive device 61.

When the transducer, or detector, occupies the state in which an objectis present in the beam path 68, both switches S1 and S2 are closed,wherewith the light beam will extend from the light emitting device 60to the light sensitive device 61, via the inner beam path 72, 70, 73.

The prism 63 and the devices 60, 61 are preferably incapsulated. Thisaffords the additional advantage of enabling the control device 1 to beconstructed to compare the outward signal from the light sensitivedevice 61 when the beam path 68 is used and when the inner beam path 72,70, 73 is used. The difference in amplitude between these signals is,inter alia, a measurement of the extent of dirt on the different opticalelements in the beam path 68.

It will be evident that the light sensitive device 61 may, instead,replace the reflector 62 and be placed in its position so as to generatea direct beam path between the light emitting and the light sensitivedevice. In this case, there can be used a prism which has only one sidethereof coated with an LCD-layer. However, in this case, no inner beampath is obtained.

Different types of transducer and different types of control circuitshave been described in the aforegoing. It will be obvious to one skilledin this art, however, that the present invention can be applied with anytype of transducer or devices in its measuring range capable of beingactivated electrically in a manner to influence the transducer such asto assume or to indicate a state which deviates from the state indicatedin the absence of such influence, for the purpose of monitoring thefunction of the transducer.

It will also be evident that the structural design of the controlcircuits can be varied essentially, while retaining the aforedescribedfunction with respect to two or more switches S1, S2.

It will also be evident that modifications and variations can be made.

The invention is thus not restricted to the aforedescribed exemplifyingembodiments, since such embodiments can be varied and modified withinthe scope of the following claims.

I claim:
 1. An arrangement for monitoring a transducer which produces anoutput signal that is a signal type selected from signals includinganalogue and digital output signals corresponding to and representativeof a state detected by the transducer wherein means in the transducerincludes activatable and deactivatable elements (RB 3, 23; C3, C4; 66,67) operative to cause said transducer to produce a signal whichdeviates from the signal representing the actual state sensed by thetransducer, regardless of which state is actual sensed; and wherein thearrangement includes a control circuit (10, 10', 10") which is operativein activating and/or deactivating said elements in a predeterminedsequence in response to a given test pulse control signal; a controldevice (1) is included for providing said test pulse signal, for sensingthe output signal of the transducer and for comparing changes in theoutput signal in dependence on the activation and/or deactivation ofsaid elements (RB 3, 23; C3, C4; 66, 67); and also wherein said controldevice (1) has means which will detect whether the function of thetransducer is correct or not on the basis of said comparison.
 2. Anarrangement according to claim 1, wherein said elements (RB 3, 23; C3,C4) are integrated in said electronics of the transducer and compriseactivatable and deactivatable electrical elements.
 3. An arrangementaccording to claim 2, wherein electronic switches are provided in saidtransducer; said elements (RB 3, 23; C3, C4; 66, 67) are arranged to beactivated and deactivated by means of said electronic switches; and inthat said control circuit (10, 10', 10") is intended to control saidswitches in said predetermined sequence.
 4. An arrangement as defined inclaim 3, wherein said electronic switches are transistors.
 5. Anarrangement according to claim 1, wherein said elements (66, 67) areseparate from the electronics of the transducer and consist of elementswhich can be activated into or deactivated from the detecting range ofthe transducer in space.
 6. An arrangement according to claim 1, whereinsaid control circuit (10, 10', 10") is integrated in the transducer. 7.An arrangement according to claim 6, wherein said means in the controldevice (1), which is intended to carry out said comparison and arrangedto send a signal to the remaining part of the control device (1)indicative of the fact of whether or not the function of the transduceris correct, is integrated in said transducer.
 8. An arrangementaccording to claim 1, in which the transducer is a digital transducerwhich produces either one of two signals indicating one of two states,wherein said control circuit (10, 10', 10") is constructed to firstdetect which of said two states is indicated by the transducer and thento activate or deactivate said elements (RB 3, 23; C3, C4, 66, 67) in amanner such as to cause the transducer to produce a signal correspondingto the other of said two states.
 9. An arrangement according to claim 8,wherein the control circuit (10, 10', 10") is constructed to re-set thetransducer after said comparison, so as to cause the transducer toindicate the state which it indicated prior to activation ordeactivation of said elements by said control circuit.
 10. Anarrangement according to claim 1, wherein the transducer is an inductivetransducer, and wherein said elements consist of impedances which areinductances (23) and resistances (RB 3) which are activated and/ordeactivated in or from the signal generating circuit of the transducer.11. An arrangement according to claim 1, wherein the transducer used isa capacitive transducer, and wherein said elements comprise impedances,which are capacitances (C3, C4) which are activated and/or deactivatedin or from the signal generating circuit of the transducer.
 12. Anarrangement according to claim 1, wherein the transducer used is anoptical transducer and a light emitting device, a reflector and alight-sensitive device are associated with said optical transducer, andwherein said elements include means (63, 66, 67) for interrupting a beampath extending between said light emitting device (60) and saidlight-sensitive device (61) via said reflector (62), said arrangementfurther comprising interrupting means (63, 66, 67) for establishing analternative beam path from said light emitting device (60) to said lightsensitive device (61).
 13. An arrangement according to claim 12, whereinsaid interrupting means includes a prism (63) having at least one of twosides thereof coated with an LCD-film (66, 67) which is operative inchanging the refractive index on the side in question, thereby changingthe beam path.